Differential reference signal distribution method and system

ABSTRACT

In a reference signal distribution system, a first subsystem is configured to distribute a reference signal to a second subsystem. The first subsystem includes multiple diode-connected devices biased by a reference current and configured to establish a differential voltage between a first node and a second node. The second subsystem includes multiple diode-connected devices driven by the differential voltage and configured to generate a copy current associated with the reference current.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims the benefit of U.S. ProvisionalApplication 61/990,107 filed May 8, 2014, which is incorporated hereinby reference.

BACKGROUND

Unless otherwise indicated herein, the approaches described in thissection are not prior art to the claims in this application and are notadmitted to be prior art by inclusion in this section.

Reference signals are mostly required in integrated circuit (IC)subsystems, either for the purpose of analog signal processingcomputations (e.g., A/D conversion, thresholding, offset shifting,measurement reference, etc.), or to determine the bias level of analogcircuits.

Accurate distribution of reference signals to multiple subsystems on alarge or complex integrated circuit is a frequent challenge todesigners, especially in the modern “system on a chip” approach. Due tothe inaccuracy of the absolute values of IC component parameters (e.g.,capacitance, resistance, transistor threshold and gain), it is difficultto generate precision reference voltages or currents on integratedcircuits. Circuit designs, that are commonly used to generate precisionreference currents or voltages, often occupy large space, consume muchpower, have special start-up requirements and may require activetrimming during IC production. For these reasons, when precisionreferencing is needed in any IC system, it is usually preferable togenerate only one such reference signal centrally, either on the chip,or by an external component. “Copies” of this reference signal are thendistributed to the subsystems where it is needed.

Conventional approaches of distributing either reference voltage orreference current to various subsystems in a large integrated circuitare inadequate. For example, distribution of multiple copies of acurrent signal can lead to unwanted circuit complexity (the signaldistribution to each destination requires an individual signal wire) andpower consumption (due to centrally generating multiple copies of acurrent signal at a subsystem).

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other features of the present disclosure will becomemore fully apparent from the following description and appended claims,taken in conjunction with the accompanying drawings. These drawingsdepict only several embodiments in accordance with the disclosure andare, therefore, not to be considered limiting of its scope. Thedisclosure will be described with additional specificity and detailthrough use of the accompanying drawings.

FIG. 1 is a functional schematic of one example reference signaldistribution system;

FIG. 2 is a functional schematic of another example reference signaldistribution system;

FIG. 3 is a functional schematic of another example reference signaldistribution system;

FIG. 4 is a functional schematic of another example reference signaldistribution system; and

FIG. 5 is a flowchart of an illustrative embodiment of a method foroperating the reference signal distribution reference signaldistribution system, all arranged in accordance with at least someembodiments of the present disclosure.

DETAILED DESCRIPTION

The technical details set forth in the following description enable aperson skilled in the art to implement one or more embodiments of thepresent disclosure.

FIG. 1 is a functional schematic of one example reference signaldistribution system 100 in accordance with at least some embodiments ofthe present disclosure. FIG. 2 is a functional schematic of anotherexample reference signal distribution system 200 in accordance with atleast some embodiments of the present disclosure. FIG. 3 is a functionalschematic of another example reference signal distribution system 300 inaccordance with at least some embodiments of the present disclosure.FIG. 4 is a functional schematic of another example reference signaldistribution system 400 in accordance with at least some embodiments ofthe present disclosure. Each of the reference signal distributionsystems 100, 200, 300 and 400 includes a plurality of subsystemsSUB1-SUBm (m is a positive integer larger than 1) which may beelectrically connected to each other via two signals wires W1 and W2.One of the subsystems SUB1-SUBm (hereafter as “reference subsystem”) maybe biased by a controllable reference current, either centrallygenerated or externally supplied, in order to establish a differentialvoltage between a first terminal (designated by a node N1) and a secondterminal (designated by a node N2) of the reference subsystem. Thedifferential voltage may then be distributed as a reference signal toanother one or multiple subsystems (hereafter as “destinationsubsystem”) when needed. Based on the distributed reference signal, copyof the reference current may be reproduced on one or multipledestination subsystems.

In the reference signal distribution system 100 illustrated in FIG. 1and the reference signal distribution system 200 illustrated in FIG. 2,each of the subsystems SUB1-SUBm may include a first-typediode-connected device, a second-type diode-connected device, a powersupply and a power offset. QN1-QNm represent the first-typediode-connected devices of the subsystems SUB1-SUBm, respectively.QP1-QPm represent the second-type diode-connected devices of thesubsystems SUB1-SUBm, respectively. V_(SUPPLY1)-V_(SUPPLYm) representthe power supplies of the subsystems SUB1-SUBm, respectively.V_(OFFSET1)-V_(OFFSETm) represent the power offsets of the subsystemsSUB1-SUBm, respectively. The diode-connected devices QN1-QNm and QP1-QPmmay be, but not limited to, metal-oxide-semiconductor field-effecttransistors (MOSFETs), bipolar junction transistors (BJTs), or anothertype of diode-connected devices having similar function. Forillustrative purposes, each of the diode-connected devices QN1-QNm isdepicted as a MOSFET having a first end (drain) and a control end (gate)connected together at the node N1, and each of the diode-connecteddevices QP1-QPm is depicted as a MOSFET having a first end (drain) and acontrol end (gate) connected together at the node N2 in FIGS. 1-4.

In an embodiment according to the present disclosure, the first-typediode-connected devices QN1-QNm and the second-type diode-connecteddevice QP1-QPm are doped with different types of carriers. Forillustrative purposes, each of the first-type diode-connected devicesQN1-QNm is depicted as a diode-connected N-typemetal-oxide-semiconductor field-effect transistor (N-MOSFET), and eachof the second-type diode-connected devices QP1-QPm is depicted as adiode-connected P-type metal-oxide-semiconductor field-effect transistor(P-MOSFET) in FIGS. 1-4.

For illustrative purposes, it is assumed that reference signals areprovided in the reference subsystem SUB1 and then distributed to one ormultiple destination subsystems SUB2-SUBm in order to generate copies ofthe reference signals. In an embodiment according to the presentdisclosure, a reference current I_(REF) may be supplied into the drainof the first-type diode-connected device QN1 by a reference currentsource IS in the reference subsystem SUB1, as depicted by the referencesignal distribution system 100 illustrated in FIG. 1 and the referencesignal distribution system 300 illustrated in FIG. 3. In anotherembodiment according to the present disclosure, a reference currentI_(REF) may be drawn from the drain of the second-type diode-connecteddevice QP1 by the reference current source IS in the reference subsystemSUB1, as depicted by the reference signal distribution system 200illustrated in FIG. 2 and the reference signal distribution system 400illustrated in FIG. 4.

In each subsystem of the reference signal distribution systems 100, 200,300 and 400, the second ends (sources) of the first-type and second typediode-connected devices are connected together to create a floatingcomplimentary metal-oxide-semiconductor (CMOS) series diode pair. If thereference current I_(REF) is supplied into the drain of thediode-connected device QN1 or drawn from the drain of thediode-connected device QP1, the floating CMOS series diode pair formedby QN1 and QP1 may be biased to create a voltage difference between thetwo nodes N1 and N2. This differential voltage V_(DIFF) establishedbetween the nodes N1 and N2 may be distributed to one or multiplesubsystems SUB2-SUBm using two signal wires W1 and W2.

When the reference subsystem SUB1 is connected to the destinationsubsystem SUB2 via the two signal wires W1 and W2, the floating CMOSseries diode pair formed by QN2 and QP2 may be biased by thedifferential voltage V_(DIFF). Consequently, a copy current I_(COPY2)associated with the reference current I_(REF) may flow through the loadresistance of the destination subsystem SUB2. The value of the copycurrent I_(COPY2) is determined by the ratio between the sizes of thediode-connected devices QN2 and QN1 and by the ratio between the sizesof the diode-connected devices QP2 and QP1.

In an embodiment when the diode-connected devices QN1, QP1, QN2 and QP2have the same size in width, the copy current I_(COPY2) flowing throughthe destination subsystem SUB2 may be (approximately) the same as thereference current I_(REF) flowing through the reference subsystem SUB1,regardless of any differences (within certain limits) between the powersupply V_(SUPPLY1) of the reference subsystem SUB1 and the power supplyV_(SUPPLY2) of the destination subsystem SUB2 and regardless of anydifferences (within certain limits) between the power offset V_(OFFSET1)of the reference subsystem SUB1 and the power offset V_(OFFSET2) of thedestination subsystem SUB2.

In another embodiment, the copy current I_(COPY2) flowing through thedestination subsystem SUB2 may be a scaled replica of the referencecurrent I_(REF) flowing through the reference subsystem SUB1. This canbe achieved by scaling the width of the first-type diode-connecteddevices QN2 by the required scaling factor relative to the width of thefirst-type diode-connected devices QN1, and by scaling the width of thesecond-type diode-connected devices QP2 by the required scaling factorrelative to the width of the second-type diode-connected devices QP1.

At least one benefit of the above described approach is that thereference current I_(REF) can be reproduced anywhere in the referencesignal distribution system 100, without the need to access or referenceto the exact supply voltages used at the reference subsystem(V_(SUPPLY1) and V_(OFFSET1) of the reference subsystem SUB1).

Yet another benefit with the above described approach is that thereference current I_(REF) can be reproduced multiple times withoutcompromising the differential voltage between the signal lines W1 andW2. The reason is that the gates of all diode-connected devices in thedestination subsystems draw no current from the nodes N1 and N2. Sincethe copy current I_(COPY2) flowing through the destination subsystemSUB2 is solely dependent on the voltage difference between the nodes N1and N2, the magnitude of the reproduced copy current I_(COPY2) will beindependent of local variations in supply voltages (V_(SUPPLY2) andV_(OFFSET2) of the destination subsystem SUB2).

Yet another benefit with the above described approach is the ability toreproduce any number or magnitude of copies of the original referencecurrent without causing extra power dissipation. The reason is thatdistribution of a reference signal as a differential voltage using twosignal wire consumes much less power than the prior art method ofdistributing all required copies of the reference current which aregenerated at the reference subsystem.

Yet another benefit with the above described approach is the ability toreproduce any number or magnitude of copies of the original referencecurrent without causing circuit complexity. The reason is thatdistribution of a reference signal as a differential voltage accordingto the present disclosure only requires two signal wires, instead ofusing individual wires to distribute all required copies of thereference current to each destination in the prior art.

If higher precision in the reproduction of the reference currents, orgreater independence from local supply variations, is required, acascoded approach, as shown in FIG. 3 and FIG. 4, may be implemented. Inthe reference signal distribution system 300 illustrated in FIG. 3 andthe reference signal distribution system 400 illustrated in FIG. 4, thereference subsystem SUB1 further includes two cascode bias V1 and V2,and each of the destination subsystem SUB2-SUBm further includes anadditional first-type diode-connected device and an additionalsecond-type diode-connected device coupled in series to the local CMOSseries diode pair. QN2′-QNm′ represent the additional first-typediode-connected devices of the subsystems SUB2-SUBm, respectively.QP2′-QPm′ represent the additional second-type diode-connected devicesof the subsystems SUB2-SUBm, respectively. The diode-connected devicesQN2′-QNm′ and QP2′-QPm′ may be, but not limited to, MOSFETs, BJTs, oranother type of diode-connected devices having similar function. In FIG.3 and FIG. 4 for illustrative purposes, the additional first-typediode-connected devices QN1′-QNm′ of the subsystems SUB1-SUBm aredepicted as NMOSFETS each having a first end (drain) and a control end(gate) connected together at a node N3, and the additional second-typediode-connected devices QP1′-QPm′ of the subsystems SUB1-SUBm aredepicted as PMOSFETS each having a first end (drain) and a control end(gate) connected together at a node N4.

In the destination subsystem SUB2 of the reference signal distributionsystem 200 illustrated in FIG. 3 and FIG. 4, the first-typediode-connected device QN2 and the second-type diode-connected deviceQP2 form a transconductance amplifier, and the additional first-typediode-connected device QN2′ and the additional second-typediode-connected device QP2′ forms a current buffer. The purpose of QN2′and QP2′ is to ensure that QN2 and QP2 respectively, may each see aconstant drain-to-source voltage and thus generate currents that are nowindependent of local supplies (within limits) or load resistance (withinlimits). Four signal wires W1-W4 are now required to transmit thereference signal from a reference subsystem to one or multipledestination subsystems in the reference signal distribution systems 300and 400. The generated copies may still be dependent only on thedifferential voltage V_(DIFF) between the nodes N1 and N2 and unaffectedby the local variations in supply voltage or load resistance.

FIG. 5 is a flowchart of an illustrative embodiment of a method todistribute reference signals in accordance with at least someembodiments of the present disclosure. Method 500 may include one ormore operations, functions or actions as illustrated by one or more ofblocks 502, 504, 506, and/or 508. The various blocks may be combinedinto fewer blocks, divided into additional blocks, and/or eliminatedbased upon the desired implementation. Method 500 may also be performedby a reference signal distribution system, such as the ones described inconjunction with FIGS. 1, 2, 3, and 4.

Processing for method 500 may begin at block 502, “provide a referencecurrent”. Block 502 may be followed by block 504, “bias a first floatingCMOS series diode pair by the reference current to establish adifferential voltage between a first node and a second node.” Block 504may be followed by block 506, “couple a second floating CMOS seriesdiode pair to the first node and the second node to receive thedifferential voltage.” Block 506 may be followed by block 508, “generatea copy current associated with the reference current using the secondfloating CMOS series diode pair driven by the differential voltage.”

Although the approach discussed above in conjunction with FIG. 1 to FIG.5 principally refers to a reference current distribution system, itshould be apparent to those skilled in the art to use such a referencesignal distribution system to distribute reference voltages. Morespecifically, the current source IS in the reference signal distributionsystems 100 and 200 may be replaced by a reference voltage sourceV_(REF) in series with a resistor for providing the reference currentI_(REF). Copies of the reference current I_(REF) may be reproduced ateach destination subsystem and then converted back to copy voltagesthrough a matched resistor at each destination subsystem. The referencecurrent V_(REF) can be reproduced anywhere and many times in thereference signal distribution systems 100 and 200 without the need toaccess or reference to the exact supply voltages used at the referencesubsystem, without compromising the differential voltage between thesignal lines W1 and W2, and without causing extra power dissipation orcircuit complexity.

Although the present disclosure has been described with reference tospecific exemplary embodiments, it will be recognized that thedisclosure is not limited to the embodiments described, but can bepracticed with modification and alteration within the spirit and scopeof the appended claims. Accordingly, the specification and drawings areto be regarded in an illustrative sense rather than a restrictive sense.

I claim:
 1. A reference signal distribution system, comprising: a firstsubsystem biased by a reference current and configured to establish adifferential voltage between a first node and a second node; and asecond subsystem driven by the differential voltage and configured togenerate a copy current associated with the reference current, thesecond subsystem comprising: a first diode-connected device including: afirst end coupled to the first node; a second end; and a control endconnected to the first end of the first diode-connected device; and athird diode-connected device including: a first end coupled to thesecond node; a second end connected to the second end of the firstdiode-connected device; and a control end connected to the first end ofthe third diode-connected device.
 2. The reference signal distributionsystem of claim 1, wherein the first subsystem comprises: a thirddiode-connected device including: a first end coupled to the first node;a second end; and a control end coupled to the first end of the thirddiode-connected device; and a fourth diode-connected device including: afirst end coupled to the second node; a second end connected to thesecond end of the third diode-connected device; and a control endcoupled to the first end of the fourth diode-connected device.
 3. Thereference signal distribution system of claim 2, wherein a ratio betweenthe copy current and the reference current is associated with a ratiobetween a size of the first diode-connected device and a size of thethird diode-connected device, and associated with a ratio between a sizeof the second diode-connected device and a size of the fourthdiode-connected device.
 4. The reference signal distribution system ofclaim 2, wherein: the first diode-connected device and the thirddiode-connected device are transistors of a first doping type; and thesecond diode-connected device and the fourth diode-connected device aretransistors of a second doping type different from the first dopingtype.
 5. The reference signal distribution system of claim 1, whereinthe second subsystem further comprises: a fifth diode-connected deviceincluding: a first end coupled to a third node; a second end coupled tothe first node; and a control end coupled to the first end of the fifthdiode-connected device; and a sixth diode-connected device including: afirst end coupled to a fourth node; a second end coupled to the secondnode; and a control end coupled to the first end of the sixthdiode-connected device.
 6. The reference signal distribution system ofclaim 5, wherein the first subsystem further comprises: a first cascodebias coupled between the first node and the third node; and a secondcascode bias coupled between the second node and the fourth node.
 7. Thereference signal distribution system of claim 5, wherein: the firstdiode-connected device, the third diode-connected device and the fifthdiode-connected device are transistors of a first doping type; and thesecond diode-connected device, the fourth diode-connected device and thesixth diode-connected device are transistors of a second doping typedifferent from the first doping type.
 8. The reference signaldistribution system of claim 1, wherein: the first subsystem furthercomprises: a voltage source configured to provide a reference voltage;and a first resister coupled in series to the voltage source forconverting the reference voltage into the reference current; and thesecond subsystem further comprises: a second resister for converting thecopy current into a copy voltage, wherein the copy voltage is associatedwith the reference voltage.
 9. A method of distributing referencesignals, comprising: providing a reference current in a first subsystemthat includes a first floating complimentary metal-oxide-semiconductor(CMOS) series diode pair coupled between a first node and a second node;biasing the first floating CMOS series diode pair by the referencecurrent to establish a differential voltage between the first node andthe second node; coupling a second floating CMOS series diode pair of asecond subsystem to the first node and the second node to receive thedifferential voltage; and generating a copy current associated with thereference current at the second subsystem using the second floating CMOSseries diode pair driven by the differential voltage.
 10. The method ofclaim 9, further comprising: providing a reference voltage at the firstsubsystem; converting the reference voltage into the reference currentat the first subsystem; converting the copy current into a copy voltageat the first subsystem, wherein the copy voltage is associated with thereference voltage.
 11. The method of claim 9, further comprising:coupling a first end of the second floating CMOS series diode pair to apower supply via a first current buffer at the second subsystem; andcoupling a second end of the second floating CMOS series diode pair to apower offset via a second current buffer at the second subsystem.